Intel Central Processing Unit part #: FH8065501516710S R1D1 | CPU | DEX
Intel Central Processing Unit part #: FH8065501516710S R1D1 | CPU | DEX
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Description
Intel Central Processing Unit part #: FH8065501516710S R1D1 Features:
• SKUs containing two, four, or eight cores — Intel® Xeon® processor Instruction Set Architecture (ISA) compatibility — Out-of-order instruction execution — Intel® Virtualization Technology, VT-x2 — 1 MB shared L2 Cache (per two cores), 4 MB L2 total for the eight-core SKUs — SKU base frequencies of 1.7 GHz and 2.4 GHz — Intel® Turbo Boost Technology for speeds up to 2.7 GHz depending on SKU
• Dual-Channel DDR3 Memory — Single- or Dual-Channel Memory Controller, SKU dependent — DDR3L (1.35V), DDR3 (1.5V), SKU dependency — Speeds up to 1600 MT/s depending on SKU — ECC support — Support for single- or dual-rank DIMMs — Support up to two DIMMs per channel — Up to 64 GB DDR3 memory capacity support, depending on product SKU.
• Integrated — PCI Express* Gen 2 Root Ports, up to 16 lanes, bifurcates to 4 controllers — Four Enterprise Class Gigabit Ethernet (GbE) Ports Per SoC (1 Gb or 2.5 Gb) • Network Controller Sideband Interface (NC-SI) allows for connectivity to a Baseboard Management Controller (BMC) for the purpose of enabling out-of-band remote manageability. • SMBus ports are available and continue to be available to enable network manageability implementations. • SoC designs can use either SMBus or NC-SI for connectivity to the BMC, but not both. • The SoC GbE Interface provides support for IEEE* 802.3 1000BASE-KX and 2500BASE-X. — Four SATA2 Ports to support high-capacity rotational media, one SKU with no SATA2 — Two SATA3 Ports to support solid-state drives (SSDs) requiring high rates of I/O operations per second (IOPS) — USB 2.0 x4, EHCI compliant — SMBus x4 (Host, PECI, normal SPD, and LAN interface)
• Based on new Intel SoC design technology — Next-Generation SoC System Agent (SSA) — Significant improvements in performance and latency than current Intel® AtomTM processor system agents. — Common legacy block controllers (SPI, UART, RTC, HPET, etc.)
• Power Management — Significant improvements to support lightweight server power management — Exposed PECI over SMBus mechanism — Highly-optimized Power Management Unit (PMU) — Support for Turbo, Running Average Power Limiting (RAPL) — SVID support to optimize power consumption
• Server-Class Reliability, Availability and Serviceability (RAS) — Data and address for memory ECC — Demand and Patrol Scrub to detect and correct memory errors — Significant internal data-path parity protection
ITL:FH8065501516710S R1D1
FH8065501516710S R1D1